This invention relates to computer storage systems and, more particularly, to high performance controllers for disk array systems. The controllers incorporate a hardware emulation controller which permits the use of high performance microprocessors while maintaining compatibility with existing controller hardware.
Computer storage systems for high capacity, on-line applications are well known. Such systems use arrays of disk devices to provide a large storage capacity. To alleviate the delays inherent in accessing information in the disk array, a large capacity system cache memory is typically utilized. Controllers known as back end directors or disk adaptors control transfer of data from the system cache memory to the disk array and from the disk array to the system cache memory. Each back end director may control several disk devices, each typically comprising a hard disk drive. Controllers known as front end directors or host adaptors control transfer of data from the system cache memory to a host computer and from the host computer to the system cache memory. A system may include one or more front end directors and one or more back end directors.
The front end directors and the back end directors perform all functions associated with transfer of data between the host computer and the system cache memory and between the system cache memory and the disk array. The directors control cache read operations and execute replacement algorithms for replacing cache data in the event of a cache miss. The directors control writing of data from the cache to the disk array and may execute a prefetch algorithm for transferring data from the disk devices to the system cache memory in response to sequential data access patterns. The directors also execute diagnostic and maintenance routines. In general, the directors incorporate a high degree of intelligence.
Current computer storage systems are characterized by high performance and high reliability. Nonetheless, as the performance of the host computers which operate with the computer storage systems increases, it is necessary to provide computer storage systems having enhanced performance. In particular, operating speeds must be increased as the operating speeds of host computers increase. Furthermore, as the cost of computer memory decreases and program complexity increases, the volumes of data transferred increase. Because computer storage systems are frequently used in highly critical applications, reliability is an important consideration. The storage systems must remain operational, even when certain components and subsystems fail. Accordingly, the storage systems may incorporate redundant hardware and are extensively tested. Because the performance of computer storage systems is determined to a significant degree by the performance of the controllers, there is a need for very high performance, high reliability controllers for computer storage systems.
According to a first aspect of the invention, apparatus comprises a first processor of a first processor type, system circuitry configured for operation with a second processor of a second processor type, and a hardware emulation controller coupled between the first processor and the system circuitry. The hardware emulation controller provides signals to the system circuitry in response to signals received from the first processor, wherein the hardware emulation controller emulates a processor of the second processor type. The hardware emulation controller provides signals to the first processor in response to signals received from the system circuitry, wherein the hardware emulation controller emulates system circuitry configured for operation with a processor of the first processor type.
In a preferred embodiment, the first processor type comprises a Power PC microprocessor, and the second processor type comprises a 68060 microprocessor.
The hardware emulation controller may comprise means for translating address signals supplied by the first processor to address signals that are compatible with the processor of the second processor type. The hardware emulation controller may further comprise means from translating control signals supplied by the first processor to control signals that are compatible with a processor of the second processor type.
According to a second aspect of the invention, a controller is provided for a computer storage system comprising an array of storage devices, a system cache memory and a plurality of controllers for controlling data transfer to and between the array of storage devices, the system cache memory and a host computer. The controller comprises a first processor, system circuitry and a hardware emulation controller as described above.
According to a third aspect of the invention, a method is provided for operation of apparatus comprising a first processor of a first processor type and system circuitry configured for operation with a second processor of a second processor type. The method comprises the steps of providing a hardware emulation controller coupled between the first processor and the system circuitry. The hardware emulation controller provides signals to the system circuitry in response to signals received from the first processor, wherein the hardware emulation controller emulates a processor of the second processor type. The hardware emulation controller further provides signals to the first processor in response to signals received from the system circuitry, wherein the hardware emulation controller emulates system circuitry configured for operation with a processor of the first processor type.